PSPICE Net list
* CMOS Inverter M1 2 1 3 3 PMOS1 M2 2 1 0 0 NMOS1 C1 2 0 0.05p VCC 3 0 5V VIN 1 0 0V pulse ( 5 0 1ns 1ns 1ns 40ns 80ns) .MODEL NMOS1 NMOS .MODEL PMOS1 PMOS .OP .TRAN 0.5ns 100ns .PLOT TRAN v(1) v(2) .END .
Logical expression
OUT =~( IN )
Truth Table
| IN | OUT |
| 0 | 1 |
| 1 | 0 |
See Also ...
CMOS Inverter Fig. ( spice_CMOS-Inverter.DXF )
