*Hysteresis Gate V1 4 0 0 sin( 0 1.2 500 ) R1 3 4 10k R2 3 5 10k R3 1 5 100k D1 0 5 Diode D2 5 0 Diode X1 3 0 1 OPAMP .SUBCKT OPAMP 1 2 6 R_in 1 2 10MEG E_gain 3 0 1 2 10k R_p1 3 4 1k C_p1 4 0 1.59p E_buffer 5 0 4 0 1 R_out 5 6 10 .ENDS .MODEL Diode D () .PLOT TRAN v(4) v(5) .TRAN .2m 5m 0 .END .
